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Details for: Fault tolerant and fault testable hardware design
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Fault tolerant and fault testable hardware design
By:
Lala, Parag K
.
Publisher:
Hyderabad :
BS Publications,
1990
Description:
263 p. ; ill., 24 cm
.
ISBN:
9788178000381.
Subject(s):
Electronic digital computers
|
Reliability
|
Fault-tolerant computing
|
Boolean differences
|
Built-in test
|
Checking experiment
|
D-Algorithm
|
Distingishing sequence
|
Hybrid redundancy
|
JPL-STAR
|
Level-sensitive scan design
|
N-modular redundancy
|
Orthogonal Latin squares
|
Reed-Muller expansion
|
Self-testing
|
Totally self-checking checkers
|
Unidirectional fault
|
Watching timer
|
PODEM
DDC classification:
621.3819
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621.3819 LAL (
Browse shelf
)
Checked out
15/12/2024
033465
Includes bibliographical references and index.
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